Architecture, Compilers, and Parallel Computing
As we approach the end of Moore’s Law, and as mobile devices and cloud computing become pervasive, all aspects of system design—circuits, processors, memory, compilers, programming environments—must become more energy efficient, resilient, and programmable.
Our research groups explore energy efficiency via low-voltage design techniques, specialized hardware accelerators, adaptive runtime techniques in high performance computing, efficient memory architectures for heterogeneous mobile systems, novel architectures for exascale systems, and other projects. We examine resilience through tolerating variation during chip fabrication, failure-tolerant processor architectures, scalable resilience protocols, and automated software debugging and recovery techniques. We explore programmability through architectural support for synchronization, automatic parallelization and vectorization, performance-portability for heterogeneous mobile systems, high-performance implementations of scripting languages, and highly scalable parallel run-time systems.
In addition to collaborating with major companies on a wide range of research projects, our software artifacts like LLVM and Charm++ are widely used in industry, government labs, and academic research.
Faculty & Affiliate Faculty
Computer Architecture, Parallel Computing, Memory Systems, Domain-Specific and Heterogeneous Systems, Resiliency, Approximate Computing
Compilers, Parallel Computing, Heterogeneous Parallel Systems, Hardware-Software Codesign, Edge Computing
Parallel Algorithms and Libraries, Parallel Graph Algorithms, Performance Modeling
Hardware/Software Co-Design for System-On-Chip; Reconfigurable Computing; GPU Computing and Optimization
Architectures for Security and Machine Learning
Memory and Storage Systems, Data-Driven Architectures, System-Level Architectural Interactions, Architecture Solutions for Large-Scale Systems
Programming Models and Systems for Parallel Computing, Parallel I/O
Computer Systems, Systems Architecture, Systems Security, Memory and Storage Systems
HPC and Parallel Systems, Compilers, GPU Programming
Large-Scale Parallel Systems; Runtime Systems, Tools, and Frameworks for High-Performance Computing
Non-Conventional Computer Architecture: Bio-Inspired, Molecular, Cellular, and Analog-Digital Hybrid Computing
HPC, Reconfigurable Computing, GPU Computing and Optimization
Power- and Reliability-Aware Architectures, Approximate Computing
Parallel Computing, Architecture, Reliability, Architectures for Genomic Applications
Approximate Computing Techniques
Quality of Experience, Tele-Immersion, Multi-View Visualization, Embedded Sensors, Distributed and Parallel Systems
Parallel Numerical Algorithms, Performance Modeling
Compiler Techniques for Parallel Computing, Compiler Evaluation and Testing, Autotuning Strategies and Systems
High-Performance and Parallel Systems
Parallel Computing, Compilers for Parallel Computing, Parallel Generic and Graph Libraries, Parallel Architecture, Exascale Computing
Large-Scale Parallel Systems, Algorithms, Libraries
High-Performance Computing, Communication Cost Analysis, Tensor Computations, Quantum Simulation
Parallel Architectures, Energy-Efficiency Architectures, Hardware/Software Co-Design, Programmability
System Verification and Security; Analog and Digital Hardware Validation
Computer-Aided Design of Integrated Circuits
Adjunct Faculty
Compilers, Hardware-Software Interaction, Software Frameworks for High-Performance Computing
Accelerator Architecture, Approximate Computing, FPGA, VLSI, CAD
Seminars
- Architecture, Compilers, and Parallel Computing Seminar
Tuesdays
4:00 - 5:00 pm
4403 Siebel Center - Illinois Computer Science Speaker Series
CS Faculty Secure New NSF Grants Totaling $4.2 million
News | September 8, 2020
With 23 New Faculty, Illinois CS Expands Prowess in Education, Research
News | September 1, 2020
In Memoriam: Computing Pioneer Frances Allen
News | August 7, 2020
PhD Students Win Highly Competitive Fellowships from Industry
News | July 28, 2020