Josep Torrellas group awarded IEEE Micro Top Picks and three Honorable Mentions from Computer Architecture Conferences

2/9/2024 Mackenzie Wranovics

Written by Mackenzie Wranovics

Josep TorrellasIllinois computer science faculty's groundbreaking technology advancements continue to be award-winning. 

Illinois Computer Science professor Josep Torrellas' research group was awarded one IEEE Micro Top Picks from Computer Architecture Conferences and three Honorable Mentions. The IEEE Micro Top Picks and Honorable Mentions honor 12 papers in each category out of all the published pieces in the computer architecture research area over the past year.

Torrellas noted that his group’s papers represent work completed in the ACE Center for Evolvable Computing.

Congratulations to each of the following projects and the authors involved.


Torrellas' paper with graduate student Gerasimos Gerogiannis was selected as one of the Top Picks from Computer Architecture Conferences by the IEEE Micro journal. The work presents Micro-Armed Bandit, a novel use of simple reinforcement learning techniques to improve the performance of processor pipelines.

Three papers from the Torrellas group were named Honorable Mentions by the journal.

  • Student Zirui Neil Zhao, together with former Illinois CS Professor Christopher W. Fletcher, now Associate Professor at the University of California, Berkeley, Professor Adam Morrison, and Josep Torrellas introduce the Untangle security framework for low information leakage and high-performance dynamic partitioning of processor structures. 
  • Students Gerasimos Gerogiannis, Serif Yesil, Damitha Lenadora, and Dingyuan Cao, together with Illinois CS Professor Charith Mendis and Josep Torrellas propose the SPADE hardware accelerator designed to speed up sparse matrix multiplication and similar kernels. These operations are common in machine learning applications. 
  • Students Jovan Stojkovic and Chunao Liu, together with Purdue University CS Professor Muhammad Shahbaz and Josep Torrellas introduce đťś‡Manycore, a novel processor that is especially designed to speed up the execution of microservice applications.  

Editor’s notes

The paper Micro-Armed Bandit: Lightweight & Reusable Reinforcement Learning for Microarchitecture Decision-Making by Gerasimos Gerogiannis and Josep Torrellas, was presented at the International Symposium on Microarchitecture (MICRO), October 2023.

The paper Untangle: A Principled Framework to Design Low-Leakage, High-Performance Dynamic Partitioning Schemes by Zirui Neil Zhao, Adam Morrison, Christopher W. Fletcher, and Josep Torrellas was presented at the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2023.

The paper SPADE: A Flexible and Scalable Accelerator for SpMM and SDDMM by Gerasimos Gerogiannis, Serif Yesil, Damitha Lenadora, Dingyuan Cao, Charith Mendis, and Josep Torrellas, was presented at the International Symposium on Computer Architecture (ISCA), June 2023.  

The paper μManycore: A Cloud-Native CPU for Tail at Scale by Jovan Stojkovic, Chunao Liu, Muhammad Shahbaz, and Josep Torrellas, was presented at the International Symposium on Computer Architecture (ISCA), June 2023.


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This story was published February 9, 2024.