Rob A. Rutenbar
For more information
- Ph.D. in Computer, Information and Control Engineering, The University of Michigan, 1984.
- Department Head, University of Illinois at Urbana-Champaign, 2010-2017
- Bliss Professor of Engineering, University of Illinois at Urbana-Champaign, 2010-2017
- Software tools for integrated circuit design; tools for understanding nanoscale IC designs; silicon accelerator architectures for computationally difficult tasks
Books Authored or Co-Authored (Original Editions)
- Rob A. Rutenbar, Georges G.E. Gielen, Brian Antao, eds., Computer Aided Design of Analog Integrated Circuits and Systems, IEEE Press and Wiley-Interscience, 2002, ISBN: 047122782X.
Selected Articles in Journals
- Amith Singhee and Rob A. Rutenbar, “Why Quasi-Monte Carlo is Better Than Monte Carlo or Latin Hypercube Sampling for Statistical Circuit Analysis,” IEEE Transactions on CAD, Vol. 29, No. 11, pp. 1763-1776, November 2010.
- A. Singhee and R.A. Rutenabar, “Statistical Blockade: Very Fast Statistical Simulation and Modeling of Rare Circuit Events and Its Application to Memory Design,” IEEE Trans. On CAD, Vol. 28, No. 8, pp. 1176-1189, August 2009. (Winner of 2011 IEEE Donald O. Pederson Best Paper Award for Transactions on CAD.)
- A. Singhee, C.F. Fang, J.D. Ma and R.A. Rutenbar, “Probabilistic Interval-Valued Computation: Toward a Practical Surrogate for Statistics Inside CAD Tools,” IEEE Transactions on CAD, Vol: 27 , No: 12, pp. 2317-2330, December 2008.
- Benton H. Calhoun, Yu Cao, Xin Li, Ken Mai, Lawrence T. Pileggi, Rob A. Rutenbar and Kenneth L. Shepard, "Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS," Proceedings of the IEEE, Vol. 96, No. 2, pages 343-365, February 2008.
- A. K. Jones, S. P. Levitan, R. A. Rutenbar, Y. Xie, "Collaborative VLSI-CAD Instruction in the Digital Sandbox," submitted to IEEE Transactions on Education, October 2007.
- "Toward Silicon Perception," 2012 Intel Embedded Research & Education Summit, Intel Corp., Chandler, AZ, February 2012.
- "Analog Synthesis (and Verification) Revisited: What's Missing?," Frontiers in Analog Circuit (FAC) Synthesis and Verification Workshop, Co-located with the Computer Aided Verification (CAV) Conference, Snowbird, UT, July 2011.
- "ICIC: Integrated Circuits for Inference Computations," FCRP Center for Circuit & System Solutions (C2S2) Enterprise Theme Review, Intel Corp., Jones Farm Conference Center, Hillsboro, OR, July 2011.
- "EDA Research: Stalled, Driving in Circles, or Running out of Gas?" panel presentation at ACM/IEEE Design Automation Conference (DAC), June 2011.
- "Using the Mathematics of Money and Risk to Understand the Statistics of Nanoscale Circuits," Dept of Electrical and Computer Engineering graduate seminar, University of Illinois at Urbana Champaign, Urbana, IL, November 2010.
- 2013 Donald O. Pederson TCAD Best Paper Award (2013)
- 2011 Donald O. Pederson TCAD Best Paper Award (2011)