Torrellas to Receive the IEEE Computer Society Technical Achievement Award

5/8/2015 5:36:00 AM By Laura Schmitt, CS @ ILLINOIS

CS Professor Josep Torrellas is one of four prominent technologists who will receive the 2015 IEEE Computer Society Technical Achievement Award in June. Torrellas is being recognized for his pioneering contributions to shared-memory multiprocessor architectures and thread-level speculation.

Josep Torrellas
Josep Torrellas
Josep Torrellas

“It’s nice to receive an award, but it’s an award for the work done by many people, so I’d like to recognize my students,” Torrellas said.

During the last 15 years, Torrellas and his graduate students have made seminal research advances in the area of shared-memory multiprocessor architectures.  The contributions span the areas of cache coherence, memory consistency, thread-level speculation and synchronization. These advances make it easier to program these machines while enhancing their performance.

In addition, Torrellas’ work has addressed energy efficiency issues in multiprocessor architectures. He has devised techniques to handle process variation and wear-out, dynamic voltage reduction, memory refresh optimization, multiple voltage domains, and 3-dimensional architectures. “We explored many techniques that work together to make manycores more energy efficient,” he said. “It’s the work of many generations of students.”

Today, Torrellas is conducting research to make the multicores in smart phones and tablets more programmable, energy efficient, and secure. In one NSF-funded project, Torrellas is investigating architectural support for scripting languages like JavaScript and Python on mobile devices. CS faculty Tao Xie, Darko Marinov, and Maria Garzaran, and University of Wisconsin Professor Nam Sung Kim are collaborating on this project with him.

In another project, Torrellas is developing aggressive low-voltage architectures for computers that range from laptops to high-end exascale machines. Ideally, he aims to increase the energy efficiency of 1000-core chips by 100x, while addressing issues like processor variation and slower operating speed. Working with Professors Nam Sung Kim (University of Wisconsin), Radu Teodorescu (Ohio State University), and Ulya Karpuzcu (University of Minnesota), Torrellas is developing techniques that cut across the technology, circuits, architecture, and run-time layers. This project is funded by Intel and the Departments of Energy and Defense.