Josep Torrellas

Ph.D. Stanford University, 1992

Research Statement

The research of Professor Torrellas focuses on new processor, memory, and system technologies and organizations to build novel computer architectures. The goal is to design high-performance computers that are very easy to program, reliable, and built out of commodity components.

The main emphasis is on several areas: 1) architecture and software support for Thread-Level Speculation (TLS), 2) architectural design for reliability, debuggability, and fault recovery, 3) reconfigurable architectures (See the Morphable Multithreaded Memory Tiles (M3T) architecture), 4) architectures that integrate many processor cores and substantial memory on a chip (See the FlexRAM Intelligent Memory System), and 5) architectural techniques for energy management in advanced chips.

Professor Torrellas is the author of over 100 refereed papers in the major journals and conference proceedings. He has been in the organizing committee of many international conferences and workshops. His research has been funded by NSF, DARPA, NASA, IBM and Intel.