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Torrellas Receives Funding for Phase 2 of a DARPA PERFECT Project

CS Professor Josep Torrellas has received word that funding has been awarded for Phase 2 of a DARPA Power Efficiency Revolution for Embedded Computing Technologies (PERFECT) project that is led by Torrellas.

Josep Torrellas
Josep Torrellas

The PERFECT program’s goal is to reach a power efficiency of 75 gigaflops/watt for embedded computing systems. These systems can be found anywhere from mobile devices such as phones to traffic signals, sensors of all types, and in military devices for surveillance and reconnaissance. Current systems deliver about 10 gigaflops/watt.

“The march of technology has already improved efficiency to some extent,” said Torrellas, “and now we are designing structures and architectures that should get us to that goal by the end of the decade.”

Professor Torrellas and his co-principal investigators, Nam Sung Kim, associate professor of electrical and computer engineering at the University of Wisconsin, and Radu Teodorescu, assistant professor of computer science and engineering at The Ohio State University, recently completed Phase 1 of the project. The team is investigating an integrated approach to boost energy efficiency while mitigating and tolerating parameter variations at Near Threshold Voltage (NTV), a region where supply voltage is only slightly higher than the transistors’ threshold voltage.

“Current systems use a voltage of about 1 volt,” said Torrellas. “Our goal in the next phase is to move to 1/2 a volt. However, when you go there, the system becomes very unstable. Some parts become faster, others become slower, and others leak more power. So the trick is to design ways to make the system usable at these regimes. We are designing and taping out a multicore chip to prove that this can be done”

PERFECT is a 5.5 year project performed over three phases. Phase 1 initiated concept development and provided initial proof of impact on processing-power efficiency. Seventeen teams participated in this phase. Phase 2 will develop the technology and techniques to obtain overall processing system improvement to 75 gigaflops/watt. Phase 3 will develop the most promising technologies and provide a path to implementation.

Dr. Joseph Cross, the DARPA PERFECT program manager, expressed his “thanks and gratitude for the excellent work produced in Phase 1 by Dr. Torrellas and his team. I eagerly anticipate their future accomplishments.”