Architecture, Compilers, and Parallel Computing

a supercomputer installationAs we approach the end of Moore’s Law, and as mobile devices and cloud computing become pervasive, all aspects of system design—circuits, processors, memory, compilers, programming environments—must become more energy efficient, resilient, and programmable.

Our research groups explore energy efficiency via low-voltage design techniques, specialized hardware accelerators, adaptive runtime techniques in high performance computing, efficient memory architectures for heterogeneous mobile systems, novel architectures for exascale systems, and other projects. We examine resilience through tolerating variation during chip fabrication, failure-tolerant processor architectures, scalable resilience protocols, and automated software debugging and recovery techniques. We explore programmability through architectural support for synchronization, automatic parallelization and vectorization, performance-portability for heterogeneous mobile systems, high-performance implementations of scripting languages, and highly scalable parallel run-time systems.

In addition to collaborating with major companies, our software artifacts like LLVM and Charm++ are widely used in industry, government labs, and academic research.

CS Faculty and Their Research Interests

Sarita Adve parallel computing, memory architecture, power- and reliability-aware architectures 
Vikram Adve compiler infrastructures and techniques, secure architectures, heterogeneous systems 
Christopher Fletcher architectures for security and machine learning
Maria J. Garzaran compilers, hardware-software interaction, software frameworks for high-performance computing 
William Gropp programming models and systems for parallel computing 
Laxmikant Kale large-scale parallel systems; runtime systems, tools, and frameworks for high-performance computing 
David Padua compiler techniques for parallel computing 
Marc Snir large-scale parallel systems, algorithms, and libraries 
Edgar Solomonik communication complexity
Josep Torrellas parallel architectures, power- and reliability-aware hardware/software architectures 
Craig Zilles compilers, dynamic optimization, computer science education 

Affiliate Faculty

Deming Chen, Electrical & Computer Engineering hardware/software co-design for system-on-chip; reconfigurable computing; GPU computing and optimization
Jian Huang, Electrical & Computer Engineering computer systems, systems architecture, systems security, memory and storage systems
Wen-mei Hwu, Electrical & Computer Engineering HPC and parallel systems, compilers, GPU programming
Nam Sung Kim, Electrical & Computer Engineering non-conventional computer architecture: bio-inspired, molecular, cellular, and analog-digital hybrid computing 
Rakesh Kumar, Electrical & Computer Engineering power- and reliability-aware architectures, approximate computing 
Steve Lumetta, Electrical & Computer Engineering parallel computing, architecture, reliability, architectures for genomic applications 
Sanjay Patel, Electrical & Computer Engineering high-performance and parallel systems
Shobha Vasudevan, Electrical & Computer Engineering system verification and security; analog and digital hardware validation 
Martin Wong, Electrical & Computer Engineering computer-aided design of integrated circuits

Adjunct Faculty

Rob A. Rutenbar, University of Pittsburgh accelerator architecture, approximate computing, FPGA, VLSI, CAD 

Architecture, Compilers, and Parallel Computing Research Efforts and Groups

Architecture, Compilers, and Parallel Computing News

Kenichi Miura (MS CS '71, PhD '73) is a 2018 recipient of the College of Engineering's Alumni Award for Distinguished Service.

Distinguished Alumnus Kenichi Miura Recalls Career Path That Started With ILLIAC IV

April 19, 2018   Kenichi Miura (MS CS '71, PhD '73) is a 2018 recipient of the College of Engineering's Alumni Award for Distinguished Service.
Professor Vikram Adve will lead a five-year, $5.6 million effort to reduce the complexity and size of modern software systems.

Adve, Team Awarded $5.6 Million to Streamline Complex Modern Software

April 16, 2018   Professor and Interim CS Department Head Vikram Adve will lead a five-year, $5.6 million effort to reduce the complexity and size of modern software systems.

Vikram Adve Invested as Donald B. Gillies Professor in Computer Science

April 15, 2018   Professor and Interim CS Department Head Vikram S. Adve’s accomplishments in research and education were recognized in March when he was invested as the Donald B. Gillies Professor in Computer Science.
Penn State Emeritus Professor and Illinois Computer Science Graduate Mary Jane Irwin

Illinois Computer Science Graduate Mary Jane Irwin Honored For Longtime Dedication To Design, Automation

March 29, 2018   Penn State Emeritus Professor and Illinois Computer Science graduate Mary Jane Irwin has honored by the European Design and Automation Association with its 2018 Achievement Award.
CS Professor and Interim Department Head Vikram Adve

Amazon's HQ2 In Chicago? These Students Would Be So Psyched

February 23, 2018  

Crain's Chicago Business -- The article focuses on a University of Illinois career fair to examine the impact that Amazon choosing Chicago for its second headquarters would have for students studying CS and other tech disciplines. The article notes that brand-name West Coast companies draw talent. "We just need more of them in Chicago," says Vikram Adve, interim head of the Computer Science department at U of I. "If there were, it would give students a better reason to stay."