Architecture, Compilers, and Parallel Computing

a supercomputer installationAs we approach the end of Moore’s Law, and as mobile devices and cloud computing become pervasive, all aspects of system design—circuits, processors, memory, compilers, programming environments—must become more energy efficient, resilient, and programmable.

Our research groups explore energy efficiency via low-voltage design techniques, specialized hardware accelerators, adaptive runtime techniques in high performance computing, efficient memory architectures for heterogeneous mobile systems, novel architectures for exascale systems, and other projects. We examine resilience through tolerating variation during chip fabrication, failure-tolerant processor architectures, scalable resilience protocols, and automated software debugging and recovery techniques. We explore programmability through architectural support for synchronization, automatic parallelization and vectorization, performance-portability for heterogeneous mobile systems, high-performance implementations of scripting languages, and highly scalable parallel run-time systems.

In addition to collaborating with major companies, our software artifacts like LLVM and Charm++ are widely used in industry, government labs, and academic research.

CS Faculty and Their Research Interests

Sarita Adve parallel computing, memory architecture, power- and reliability-aware architectures 
Vikram Adve compiler infrastructures and techniques, secure architectures, heterogeneous systems 
Christopher Fletcher architectures for security and machine learning
Maria J. Garzaran compilers, hardware-software interaction, software frameworks for high-performance computing 
William Gropp programming models and systems for parallel computing 
Laxmikant Kale large-scale parallel systems; runtime systems, tools, and frameworks for high-performance computing 
David Padua compiler techniques for parallel computing 
Marc Snir large-scale parallel systems, algorithms, and libraries 
Edgar Solomonik communication complexity
Josep Torrellas parallel architectures, power- and reliability-aware hardware/software architectures 
Craig Zilles compilers, dynamic optimization, computer science education 

Affiliate Faculty

Deming Chen, Electrical & Computer Engineering hardware/software co-design for system-on-chip; reconfigurable computing; GPU computing and optimization
Jian Huang, Electrical & Computer Engineering computer systems, systems architecture, systems security, memory and storage systems
Wen-mei Hwu, Electrical & Computer Engineering HPC and parallel systems, compilers, GPU programming
Nam Sung Kim, Electrical & Computer Engineering non-conventional computer architecture: bio-inspired, molecular, cellular, and analog-digital hybrid computing 
Rakesh Kumar, Electrical & Computer Engineering power- and reliability-aware architectures, approximate computing 
Steve Lumetta, Electrical & Computer Engineering parallel computing, architecture, reliability, architectures for genomic applications 
Sanjay Patel, Electrical & Computer Engineering high-performance and parallel systems
Shobha Vasudevan, Electrical & Computer Engineering system verification and security; analog and digital hardware validation 
Martin Wong, Electrical & Computer Engineering computer-aided design of integrated circuits

Adjunct Faculty

Rob A. Rutenbar, University of Pittsburgh accelerator architecture, approximate computing, FPGA, VLSI, CAD 

Architecture, Compilers, and Parallel Computing Research Efforts and Groups

Architecture, Compilers, and Parallel Computing News

DARPA funding will support research to explore the development of flexible architectures capable of using specialized hardware to solve specific computing problems more quickly and efficiently.

Illinois CS Researchers Among Teams Selected by DARPA to Unleash Power of Specialized and Reconfigurable Hardware

July 28, 2018   Researchers will explore the development of flexible architectures capable of using specialized hardware to solve specific computing problems more quickly and efficiently.
Matt Sinclair (PhD CS '17) has been given an honorable mention for the inaugural ACM SIGARCH/IEEE CS TCCA Outstanding Dissertation Award.

Sinclair Focuses on Heterogeneous Systems as a Way Forward After Moore’s Law; New Award Recognizes His Work

July 9, 2018   Matt Sinclair (PhD CS '17) has been given an honorable mention for the ACM SIGARCH / IEEE CS TCCA Outstanding Dissertation Award.
LLVM Foundation President Tanya Lattner

The 39 Most Powerful Female Engineers of 2018

June 21, 2018  

Business Insider --  Tanya Lattner (MS CS ’05), who is president of the LLVM Foundation, makes Business Insider's annual list of the most powerful women in engineering, at No. 37.

Sarita Adve is part of an University of Illinois team who have receive $3.75 million to increase the performance, efficiency, and capabilities of electronics systems.

DARPA JUMP Center Aims to Define the Future of Microelectronics

June 11, 2018   A $3.75 million grant has been awarded to a University of Illinois team researching ways to increase the performance, efficiency, and capabilities of electronics systems.
Kenichi Miura (MS CS '71, PhD '73) is a 2018 recipient of the College of Engineering's Alumni Award for Distinguished Service.

Distinguished Alumnus Kenichi Miura Recalls Career Path That Started With ILLIAC IV

April 19, 2018   Kenichi Miura (MS CS '71, PhD '73) is a 2018 recipient of the College of Engineering's Alumni Award for Distinguished Service.