Architecture, Compilers, and Parallel Computing

a supercomputer installationAs we approach the end of Moore’s Law, and as mobile devices and cloud computing become pervasive, all aspects of system design—circuits, processors, memory, compilers, programming environments—must become more energy efficient, resilient, and programmable.

Our research groups explore energy efficiency via low-voltage design techniques, specialized hardware accelerators, adaptive runtime techniques in high performance computing, efficient memory architectures for heterogeneous mobile systems, novel architectures for exascale systems, and other projects. We examine resilience through tolerating variation during chip fabrication, failure-tolerant processor architectures, scalable resilience protocols, and automated software debugging and recovery techniques. We explore programmability through architectural support for synchronization, automatic parallelization and vectorization, performance-portability for heterogeneous mobile systems, high-performance implementations of scripting languages, and highly scalable parallel run-time systems.

In addition to collaborating with major companies, our software artifacts like LLVM and Charm++ are widely used in industry, government labs, and academic research.

CS Faculty and Their Research Interests

Sarita Adve parallel computing, memory architecture, power- and reliability-aware architectures 
Vikram Adve compiler infrastructures and techniques, secure architectures, heterogeneous systems 
Christopher Fletcher architectures for security and machine learning
Maria J. Garzaran compilers, hardware-software interaction, software frameworks for high-performance computing 
William Gropp programming models and systems for parallel computing 
Laxmikant Kale large-scale parallel systems; runtime systems, tools, and frameworks for high-performance computing 
David Padua compiler techniques for parallel computing 
Marc Snir large-scale parallel systems, algorithms, and libraries 
Edgar Solomonik communication complexity
Josep Torrellas parallel architectures, power- and reliability-aware hardware/software architectures 
Craig Zilles compilers, dynamic optimization, computer science education 

Affiliate Faculty

Deming Chen, Electrical & Computer Engineering hardware/software co-design for system-on-chip; reconfigurable computing; GPU computing and optimization
Jian Huang, Electrical & Computer Engineering computer systems, systems architecture, systems security, memory and storage systems
Wen-mei Hwu, Electrical & Computer Engineering HPC and parallel systems, compilers, GPU programming
Nam Sung Kim, Electrical & Computer Engineering non-conventional computer architecture: bio-inspired, molecular, cellular, and analog-digital hybrid computing 
Rakesh Kumar, Electrical & Computer Engineering power- and reliability-aware architectures, approximate computing 
Steve Lumetta, Electrical & Computer Engineering parallel computing, architecture, reliability, architectures for genomic applications 
Sanjay Patel, Electrical & Computer Engineering high-performance and parallel systems
Shobha Vasudevan, Electrical & Computer Engineering system verification and security; analog and digital hardware validation 
Martin Wong, Electrical & Computer Engineering computer-aided design of integrated circuits

Adjunct Faculty

Rob A. Rutenbar, University of Pittsburgh accelerator architecture, approximate computing, FPGA, VLSI, CAD 

Architecture, Compilers, and Parallel Computing Research Efforts and Groups

Architecture, Compilers, and Parallel Computing News

Professor Sarita Adve

Collaborative Research Drives Joint University Microelectronics Program

February 15, 2018   Illinois faculty will be developing algorithm-driven architectures as part of their research for the Applications Driving Architectures (ADA) center, one of six JUMP research centers.
Kale, Zhai Named ACM Fellows

Kale, Zhai Named ACM Fellows

January 18, 2018   Professors Lamikant "Sanjay" Kale and ChengXiang Zhai were among 54 new ACM Fellows named for 2017.
A chassis from ILLIAC II is on display at the Spurlock Museum.

Spurlock exhibits details University of Illinois’ first 150 years, and CS @ ILLINOIS’ key role in them.

December 1, 2017   The Spurlock Museum exhibit, "Knowledge at Work," which includes CS @ ILLINOIS artifacts, runs through Dec. 21, 2018.
Adjunct Professor Rob A. Rutenbar

Rutenbar wins ‘Nobel Prize’ of Electronic Design Automation

November 15, 2017   Rob A. Rutenbar is being honored for his pioneering contributions to algorithms and tools for analog and mixed-signal designs.
CS Professor Sarita Adve

A Q & A With Women Behind A Statement On The Importance Of Diversity In Tech

November 13, 2017 -- CS @ ILLINOIS Professor Sarita Adve and Princeton University colleague Margaret Martonosi authored a statement on the importance of diversity in tech at an October symposium. They discuss their reasons and what they hope to help achieve.