Architecture, Compilers, and Parallel Computing

a supercomputer installationAs we approach the end of Moore’s Law, and as mobile devices and cloud computing become pervasive, all aspects of system design—circuits, processors, memory, compilers, programming environments—must become more energy efficient, resilient, and programmable.

Our research groups explore energy efficiency via low-voltage design techniques, specialized hardware accelerators, adaptive runtime techniques in high performance computing, efficient memory architectures for heterogeneous mobile systems, novel architectures for exascale systems, and other projects. We examine resilience through tolerating variation during chip fabrication, failure-tolerant processor architectures, scalable resilience protocols, and automated software debugging and recovery techniques. We explore programmability through architectural support for synchronization, automatic parallelization and vectorization, performance-portability for heterogeneous mobile systems, high-performance implementations of scripting languages, and highly scalable parallel run-time systems.

In addition to collaborating with major companies, our software artifacts like LLVM and Charm++ are widely used in industry, government labs, and academic research.

CS Faculty and Their Research Interests

Sarita Adve parallel computing, memory architecture, power- and reliability-aware architectures 
Vikram Adve compiler infrastructures and techniques, secure architectures, heterogeneous systems 
Christopher Fletcher architectures for security and machine learning
Maria J. Garzaran compilers, hardware-software interaction, software frameworks for high-performance computing 
William Gropp programming models and systems for parallel computing 
Laxmikant Kale large-scale parallel systems; runtime systems, tools, and frameworks for high-performance computing 
David Padua compiler techniques for parallel computing 
Marc Snir large-scale parallel systems, algorithms, and libraries 
Edgar Solomonik communication complexity
Josep Torrellas parallel architectures, power- and reliability-aware hardware/software architectures 
Craig Zilles compilers, dynamic optimization, computer science education 

Affiliate Faculty

Deming Chen, Electrical & Computer Engineering hardware/software co-design for system-on-chip; reconfigurable computing; GPU computing and optimization
Jian Huang, Electrical & Computer Engineering computer systems, systems architecture, systems security, memory and storage systems
Wen-mei Hwu, Electrical & Computer Engineering HPC and parallel systems, compilers, GPU programming
Nam Sung Kim, Electrical & Computer Engineering non-conventional computer architecture: bio-inspired, molecular, cellular, and analog-digital hybrid computing 
Rakesh Kumar, Electrical & Computer Engineering power- and reliability-aware architectures, approximate computing 
Steve Lumetta, Electrical & Computer Engineering parallel computing, architecture, reliability, architectures for genomic applications 
Sanjay Patel, Electrical & Computer Engineering high-performance and parallel systems
Shobha Vasudevan, Electrical & Computer Engineering system verification and security; analog and digital hardware validation 
Martin Wong, Electrical & Computer Engineering computer-aided design of integrated circuits

Adjunct Faculty

Rob A. Rutenbar, University of Pittsburgh accelerator architecture, approximate computing, FPGA, VLSI, CAD 

Architecture, Compilers, and Parallel Computing Research Efforts and Groups

Architecture, Compilers, and Parallel Computing News

Professor William Gropp, the Thomas M. Siebel Chair in Computer Science

Siebel Chair Gift Keeps Giving To Gropp And Illinois CS Researchers

October 12, 2018   As the Thomas M. Siebel Chair in Computer Science, Professor Bill Gropp says he has a tool that lets him jump-start interesting science.
Rising Stars

Four From Illinois CS Chosen For 2018 Rising Stars In EECS Workshop

October 12, 2018   Three Illinois Computer Science PhD students and a post-doctoral researcher have been chosen to be part of the 2018 Rising Stars academic career-building workshop at MIT.
Incoming Department Head Nancy Amato

Chicago Inno’s 2018 50 On Fire

September 19, 2018  

Chicago Inno -- Incoming Department Head Nancy Amato and Farmers Fridge -- whose CTO is Rajesh Karmani (PhD CS '13)  -- were both part of Chicago Inno's annual 50 on Fire list of people and companies influencing the direction of the Chicago-area tech scene.

Thomas M. Siebel Chair in Computer Science and National Center for Supercomputing Applications Professor Bill Gropp

University Supercomputers Are Science's Unsung Heroes, And The Fastest Yet Is On The Way

August 30, 2018  

Popular Science -- “The machines are all over subscribed,” Bill Gropp, Illinois CS Professor and director of the National Center for Supercomputing Applications, says as work starts for what will be the next, fastest supercomputer, Frontera. Illinois' Blue Waters has been used to do things like model an enormous EF-5 tornado and to produce maps of Alaska.

 

DARPA funding will support research to explore the development of flexible architectures capable of using specialized hardware to solve specific computing problems more quickly and efficiently.

Illinois CS Researchers Among Teams Selected by DARPA to Unleash Power of Specialized and Reconfigurable Hardware

July 28, 2018   Researchers will explore the development of flexible architectures capable of using specialized hardware to solve specific computing problems more quickly and efficiently.