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Professor Josep Torrellas Receives DARPA PERFECT Award

4/18/2013 8:10:00 AM Megan Osfar, Colin Robertson

  • The DARPA Power Efficiency Revolution For Embedded Computing Technologies (PERFECT) program’s goal is to reach a power efficiency of 75 gigaflops/watt for embedded computing systems.
  • Josep Torrellas (Professor of Computer Science, University of Illinois), Nam Sung Kim (Assistant Professor of Electrical and Computer Engineering, University of Wisconsin), and Radu Teodorescu (Assistant Professor of Computer Science and Engineering, Ohio State University) look to achieve an increase in power efficiency through an integrated approach to mitigate and tolerate parameter variations at Near Threshold Voltage (NTV).
  • Profs. Torrellas, Kim, and Teodorescu were awarded $2.8 million over 5.5 years in three phases. Phase 1 of the grant, which totals $800k, began in October.

A project led by Illinois computer science professor Josep Torrellas has been chosen to receive $2.8 million from DARPA to explore how to improve power-efficiency in embedded computer systems.  The 5.5 year long project is being funded under the Power Efficiency Revolution For Embedded Computing Technologies (PERFECT) program, DARPA’s bid to attain an efficiency of 75 gigaflops/watt for such systems.

Chances are high that you used or relied on an embedded system today.  They are found in an increasing number of places, from consumer electronics, such as smartphones, tablets, and wireless readers, to traffic signals, industrial controls, remote sensors, and in military applications like surveillance and reconnaissance. However, with typical power efficiencies hovering around 1 gigaflops/watt, the capabilities of current systems can be limited.

Illinois computer science professor Josep Torrellas
Illinois computer science professor Josep Torrellas
Illinois computer science professor Josep Torrellas

Gains in efficiency would mean a longer battery life for mobile devices, a lower cost of operation, and the ability to operate at higher clock speeds without a sophisticated cooling system. Additionally, greater power efficiency would mean that more devices or computations can be run simultaneously in situations where the peak available electrical power is limited to a set amount (such as in the U.S. military’s ground and unmanned aerial vehicles), increasing the overall computational capability of the system.  It is no wonder that researchers have continuously sought to improve the power efficiency of embedded devices.

Professor Torrellas, in cooperation with Professor Nam Sung Kim (University of Wisconsin) and Professor Radu Teodorescu (Ohio State University), will investigate an integrated approach to boost energy efficiency by mitigating and tolerating parameter variations at Near Threshold Voltage (NTV), a region where supply voltage is only slightly higher than threshold voltage. Their three phase project, “Parameter Variation at Near Threshold Voltage: The Power Efficiency Versus Resilience Tradeoff,” started in October, with $800,000 dedicated to Phase 1.

Lowering a chip’s supply voltage would significantly increase power-efficiency, but when supply voltage is too low, transistors and other semiconductor devices perform poorly.  In particular, they suffer from parameter variations— deviations of process, voltage, and temperature values from nominal specifications.  Conventional ways to handle parameter variations are not sufficient for 1000-core NTV chips manufactured on aggressive technologies such as 7nm. “Current approaches are too timid and lack scalability to be truly effective,” says Torrellas.

In part, this is because current approaches largely focus on a single layer of the computing stack, assuming worst-case behavior for the other layers. To rectify this weakness, the researchers’ proposed method relies on “the synergistic operation of several novel, aggressive techniques that cut across the technology, circuits, architecture and runtime layers.” This approach promises a substantial improvement over current power efficiency, allowing them to reach the program’s goal of 75 gigaflops/watt for 7nm technologies.

In addition to the positive impact their work is expected to have on military systems, Torrellas, Kim, and Teodorescu’s advancements will provide for a number of technologies transferable to other sectors of industry, commerce, and research. In the first year alone, at Illinois, Torrellas intends to develop a novel variation-tolerant architecture of a highly power-efficient clustered many-core chip. Intel Corporation has already expressed its intention to use the researchers’ new models and architectures in advanced systems when it is beneficial.

According to Torrellas, grants like this one provide excellent, cutting-edge opportunities for Illinois graduate students, since students conduct most of the research and development work on these projects. “The experience that our students gain is invaluable to their development, and often leads to better job prospects,” says Torrellas.  “Industry and academia not only benefit from the work that we are doing now inside Siebel Center, but also from the unique insights that our graduates can provide when they begin employment elsewhere.”